Tuning RISC-V to Automotive Needs
A European flagship initiative building open, automotive-grade RISC-V processors for the software-defined vehicles of tomorrow.
About TURANDOT
TURANDOT – TUning Risc-V to Automotive Needs & Different Other Themes – is a flagship European initiative under the Chips Joint Undertaking, building strategic autonomy and leadership in automotive semiconductor technology. As vehicles become increasingly software-defined, connected and autonomous, Europe faces an urgent need to reduce its dependence on non-European proprietary processor architectures.
Integrated Device Manufacturers, IP providers, SMEs, research organisations and automotive OEMs will design, tape out and validate multiple automotive-grade RISC-V systems-on-chip, real-time and application-class processors and accelerators, targeting performance levels up to PetaOPS – aligned with zonal and centralised vehicle compute architectures and compliant with ISO 26262 and ISO 21434.
What we build
RISC-V Processors & Accelerators
Automotive-grade SoCs, real-time and application-class processors, and accelerators reaching up to one PetaOPS — aligned with zonal and centralised vehicle architectures.
Safety-Critical Software Stack
Qualifiable software stacks built for automotive-grade RISC-V platforms, compliant with ISO 26262 (functional safety) and ISO 21434 (cybersecurity).
System Integration & Demonstrators
Seven silicon demonstrators proving the maturity and competitiveness of the European RISC-V ecosystem under real automotive conditions.
Common Automotive Repository
A qualified, reusable IP and benchmarking repository accelerating industrial adoption of RISC-V across the European automotive supply chain.
Specific objectives
SO1High-Performance RISC-V Processors
Design and validate a portfolio of high-performance RISC-V processors for automotive use cases, competitive with existing ARM-based automotive-grade solutions in performance, power and safety.
SO2Software Tools & Libraries
A ready-to-integrate, qualifiable software stack – base layer, operating systems, middleware, safety and secure-boot libraries, compilers and debuggers – compatible with FreeRTOS, Zephyr, Eclipse ThreadX and Eclipse S-CORE.
SO3AI and ML Accelerators & other IPs
A coordinated portfolio of RISC-V-based AI accelerators – vector, DSP, graph-based and low-latency inference architectures – meeting ASIL-B+ safety and edge performance requirements.
SO4System Integration & Interfacing
A flexible system architecture from which application-specific platforms are derived, combining heterogeneous RISC-V CPUs, NPUs and memories across SoCs and chiplet architectures.
SO5Benchmarking & Quality Assurance
A portable, parameterizable benchmarking framework for RISC-V automotive processors and accelerators, assessing metrics such as CoreMark, latency, jitter and power consumption.
SO6Demonstration & Building-Block Interoperability
At least seven physical demonstrators based on distinct TURANDOT RISC-V SoC designs, validating integration, performance, safety and interoperability in real automotive use cases.
SO7Common Repository for Automotive RISC-V, IPs and Ecosystem
A unified, modular and secure repository that collects, validates and standardises RISC-V IP blocks, software components, interface definitions and benchmarking tools.
SO8RISC-V Positioning in Automotive
A RISC-V-based E/E architecture platform acting as a central compute node for in-vehicle systems such as infotainment, user interfaces, diagnostics and domain coordination.
SO9Cooperation Model
Trust-based collaboration between IDMs, IP design houses and other stakeholders to co-develop a shared catalogue of RISC-V IPs – laying the foundations of an “Airbus of RISC-V”.
12 countries. One European RISC-V future.
From Integrated Device Manufacturers to automotive OEMs, discover who’s building TURANDOT.